X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
X
CPUSPD
MULTI
FSB
CORE1%
CORE2%
CORE3%
CORE4%
CORE5%
CORE6%
CORE7%
CORE8%
RAM%
RAMSPD
RAMFREE
GPUSPD
GPURAM
GPU2SPD
GPU2RAM
BATT
TMB
TCPU
TCPU1
TCPU2
TCPU3
TCPU4
TCPUdio
TCORE1
TCORE2
TCORE3
TCORE4
TCORE1b
TCORE2b
TCORE3b
TCORE4b
TDIMM
TAGP
TCHIP
TNBR
TPOW
TVRM
TVRM1
TVRM2
TAUX
TGPU
TGPUdio
TGPUa
TGPUm
TGPUv
TGPU2
TGPU2d
TGPU2a
TGPU2m
TGPU2v
THD1
THD2
THD3
THD4
THD5
THD6
THD7
THD8
TEMP1
TEMP2
TEMP3
TEMP4
TEMP5
FCPU
FCPU1
FCPU2
FCPU3
FCPU4
FSYS
FCHI
FNB
FCHA1
FCHA2
FCHA3
FCHA4
FCHA5
FCHA6
FCHA7
FCHA8
FPSU
FFRT
FREAR
FOTES
FOTES1
FOTES2
FAUX
FAUX1
FGPU1
FGPU2
FAN1
FAN2
FAN3
FAN4
FAN5
FAN6
FAN7
FAN8
VCPU
VCPU1
VCPU2
VCPU3
VCPU4
V09V
V12V
V125V
V13V
V15V
V18V
V25V
V26V
V33V
VP5V
VM5V
VP12V
VP12U1
VP12U2
VP12V4
VM12V
VBAT
V3VSB
V5VSB
VDIMM
VRIMM
VDIVTT
VAGP
VAGPDQ
VCHIP
VNBCOR
VSBCOR
VPCIE
VHT
VVDD
VVTT
VFSBT
VGMCH
VVTR
V5VTR
VNIC
DATE
TIME
Always re-select the size
before exiting the options!
Small
Large
